Pinout

We assume a PQFP cavity up package. The pin numbering from 1 to 120 is represented on the figure bellow.

**Figure:** PCI-DDC pin numbering
$\begin{figure} \center\leavevmode \psfig {file=usage/boitier.eps}\end{figure}$

The PCI-DDC/PCI pin order respects the PCI specification recommendation (rev 2.1, page 138), except from the clk signal that is placed in order to reduce skew problem inside the component. The PCI-DDC/RCUBE pin are placed in order to avoid track crossing on the PCB, when the WEST side of RCUBE is in front of the NORTH side of PCI-DDC.

$\textstyle\parbox{\textwidth}{ \parbox{.25\textwidth}{{\bf SOUTH side} \begin{... ...f 118 ] {\bf VSSI} \item[\bf 119 ] IDSEL \item[\bf 120 ] AD[23] \end{itemize}}}$

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