Configuration port

All these registers are called configuration registers and are loaded during the initialization phase via an 8-bits parallel scanpath. The input of this configuration port is scaninconfig[7:0] and the data are written on the falling edge of the clockconfig strobe.
The configuration registers are chained in the following order :

scaninconfig[7:0] ->

link0 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link2 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link4 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link6 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link6 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link4 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link2 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link0 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
headerdeletion,headerlength ->
link1 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link3 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link5 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link7 (mbound0,lbound0,mbound1,lbound1,mbound2,lbound2,mbound3,lbound3,
mbound4,lbound4,mbound5,lbound5,mbound6,lbound6,mbound7,lbound7) ->
link7 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link5 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link3 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
link1 (output7,priority7,output6,priority6,output5,priority5,output4,priority4,
output3,priority3,output2,priority2,output1,priority1,output0,priority0) ->
scanoutconfig[7:0]

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