An Integrated PCI component for IEEE 1355 Networks

F. Wajsbürt (speaker) J.L. Desbarbieux A. Greiner
C. Spasevski S. Penain

UPMC/LIP6, 4 pl. Jussieu 75005 Paris, France

EMMSEC'97 - FLORENCE

Goal

UPMC/LIP6 developed the IEEE 1355 RCUBE router.
It is an 8x8 dynamic crossbar with 8 1Gb/s full duplex HS Links.
2 ports have both serial and parallel accesses.
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PCI-DDC is a PCI controller for an HSL network, designed to work with the RCUBE router.

PCI-DDC Function

It links RCUBE to the PCI bus (32bits 33MHz) through one of its parallel port.
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It implements a remote write primitive to move data from local memory to remote memory.

PCI-DDC / RCUBE Chipset

$\epsfig {file=mpc_arch+,width=10cm}$

PCI-DDC Features

Low Cost
- Only 1 chip to connect RCUBE and PCI-Local bus.
Efficiency
- PCI-DDC sustains RCUBE throughput while maintaining a low latency.
- The remote write primitive allows to implement efficient message passing protocols without intermediate copies.
Versatility
- PCI-DDC is usable with a large range of CPU boards.

The Remote Write Primitive

PCI-DDC is acting in master mode on the PCI bus at both sides.
The remote write is a DMA request with
- Local read
- Remote write

Direct Deposit Protocol

Preparation
- Pages descriptors are placed in a Tx-Queue
- The driver informs PCI-DDC that it has something to do
Transmission
- PCI-DDC reads a Page Descriptor
- PCI-DDC reads data of the current page and sends packets
Reception
- PCI-DDC reads packets and writes them in the memory
- It counts the received packets for each message
- Once ended, it writes a message descriptor in a RX-Queue

Direct Deposit Protocol

$\epsfig {file=trans_ar+,width=10cm}$

Message Types

Standard Message
- any number of pages of any number of bytes.
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Short Message
- 8 bytes fetched in the local TxQueue and put in the remote RxQueue.
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Composed Message
- Several emitters sends a piece of message to one receiver.
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PCI-DDC Internal Architecture

$\epsfig {file=pciddc_a+,width=10cm}$

PCI-DDC chip

$\textstyle\parbox{6cm}{\epsfig{file=../pciddc/pciddc_p,width=6cm} }$ $\textstyle\parbox{4.5cm}{ \begin{itemize} \item CQFP 120 \item 200 Ktransistors... ...aling \item up to 33\,MHz PCI Bus \item up to 80\,MHz RCUBE port\end{itemize}}$

Measured Transmission Throughput

Throughput $\epsfig {file=tx66_simple,width=6cm,angle=-90}$ Page Length

Measured Loopback Throughput

Throughput $\epsfig {file=loop66,width=6cm,angle=-90}$ Page Length

Status

Few functional bugs have been detected and analyzed.
A new run (patch metal) is planned in December 97.
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PCI-DDC samples are available.
A PCI board with RCUBE and PCIDDC is running.
Low level software debug is in progress.
PCI-DDC electrical characterization is in progress.

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